1. Field of the Invention
This invention relates generally to the field of computer processors. More particularly, the invention relates to an apparatus and method for compressing a memory address.
2. Description of the Related Art
The maximum memory space supported by a CPU can be determined by the number of bits needed to uniquely identify a specific byte. Each instruction or data byte within a CPU is associated with its external memory address, so this mapping is needed in many structures such as caches and pipeline buffers. Due to the quantity and usage of these bits, an implementation that modifies the supported memory space can significantly impact factors such as frequency, area, and power. Therefore the virtual memory space supported by x86 processors is currently limited to 48-bits due to the cost of these physical constraints.